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TCP/IP PHY Embedded Chip (High Performance) - WIZnet W5300
Description: WIZnet's W5300 is a tiny CMOS-based single chip with integrated 10/100 Ethernet controller, MAC, and TCP/IP. The
W5300 is designed for Internet embedded applications where easy
implementation, stability, high performance, and effective cost are
required. The chip is packed with features, and can be used in a number
of embedded applications including home-network devices,
serial-to-ethernet, USB-to-ethernet, security systems, building
automation, embedded servers and more.
Features:
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Supports hardwired TCP/IP protocols : TCP,UDP, ICMP, IPv4, ARP, IGMPv2, PPPoE, Ethernet
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Supports 8 independent SOCKETs simultaneously
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High network performance : Up to 80Mbps (DMA)
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Supports hybrid TCP/IP stack(software and hardware TCP/IP stack)
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IP Fragmentation is not supported
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Internal 128Kbytes memory for data communication(Internal TX/RX memory)
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More flexible allocation internal TX/RX memory according to application throughput
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Supports memory-to-memory DMA (only 16bit Data bus width & slave mode)
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Embedded 10BaseT/100BaseTX Ethernet PHY
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Supports auto negotiation (Full-duplex and half duplex)
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Supports auto MDI/MDIX(Crossover)
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Supports network Indicator LEDs (TX, RX, Full/Half duplex, Collision, Link, Speed)
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Supports a external PHY instead of the internal PHY
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Supports 16/8 bit data bus width
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Supports 2 host interface mode(Direct address mode & Indirect address mode)
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External 25MHz operation frequency (For internal PLL logic, period=40ns)
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Internal 150MHz core operation frequency (PLL_CLK, period=about 6.67ns)
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Network operation frequency (NIC_CLK : 25MHz(100BaseTX) or 2.5MHz(10BaseT))
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3.3V operation with 5V I/O signal tolerance
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Embedded power regulator for 1.8V core operation
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0.18 µm CMOS technology
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100LQFP 14X14 Lead-Free Package
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